(Now a bi-weekly program)
June 4, 2013
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Analyze This! ... Direct Digital Synthesis with the DDS-60
This time we pick up with the popular "Analyze This!" series again with a dissection and analysis of the very popular DDS circuits that serve as local oscillators in many of our homebrew projects these days. While the circuits are relatively small and principles of operation are believed known by most, you might find that some design aspects can surprise you. Whether it is voltage level translation, parasitic oscillations in the post-LPF amplifier, or high current draw and seemingly excessive package temperatures, this episode of CWTD is likely to give you additional considerations when selecting and using a DDS circuit for your next project.
73, George N2APB & Joe N2CX
Podcast -- Listen by clicking the link, or right-click and save to local hard drive for your later listening pleasure.
Sidebar text discussion during the show ...
<20:06:43> "Alan W2AEW": My first time with the DDS-60 (video from a year ago): http://www.youtube.com/watch?v=yxQOSprOo04
<20:13:44> "Clint-ka7oei": There was the DDS in the mid-late 80's by Williams - used 74F283's, IIRC... (It was in QEX, I believe.)
<20:20:47> "Ross vk3ucr": dead mike
<20:28:59> "Ross vk3ucr": Apologies for the audio, refuses to play nice!!
<20:37:53> "George - N2APB": No problem Ross. Still glad you can be with us tonight.
<20:40:22> "Alan W2AEW": The left *half* of the first lobe is called the first Nyquist zone. Ideally, your low pass filter will block the 1st image in the 2nd Nyquist zone
<20:57:05> "Alan W2AEW": ...or, maybe FM the reference input
<21:03:31> "Ken - VA3KMD": The output impedance of the AD8008 is strongly dependent on frequency.
<21:22:32> "Karl W4KRL": Sorry no mic. You said it is important to clear registers at power up. How?
<21:25:24> "George - N2APB": Proper initialization is to first do a clock raise/lower cycle to get the hardware data bits D0, D1 and D2 into the pipeline very first.
<21:25:30> "George - N2APB": Then send 32 zeros followed by 0x01 bit pattern (LSB clocked out first) to set the 6X multiplier.
<21:26:11> "George - N2APB": THEN and only then, you can start programming control words for the frequency desired.
<21:25:43> "Karl W4KRL": Thanks!
<21:26:13> "Howie K3HW": I ordered one Joe - Next shipment of 10 M pole due in at SOTABeams on 6/6/13 - They DO ship to us here in the colonies !!!
<21:26:59> "George - N2APB": The Marx sketch does NOT do this, which is probably the cause for the problems I am having with his sketch.
<21:32:29> "Bob - N2OJJ": I used the 9850 and I think it has a config word setup for 90 degree outputs
<21:34:47> "Ross vk3ucr": The Marx sketch might work ok with the 9850, I understand it uses a different initialization.
<21:36:07> "Armand WA1UQO": As always - Great show tonight! Thanks guys, Be back in two weeks!
Brief History (in relation to ham radio)
N2APB's first experience with a DDS chip ... circa 1995. This was the front panel of a transceiver kit produced by Hands Electronics (in the UK) called the "RMX-10" (??).
Tim Ahrens WB5___ in Texas designed a microcontroller-based front panel containing the AD7008 DDS chip serving as the LO for the radio.
You can see the DDS chip on the backside of the control board as the square 44-pin socketed device just to the left of the white LCD cable ... man, that chip got hot!
Top of the control board
Bottom of the controller board
Then the seminal Curtis Pruess WB2V article in QEX for July 1997 introduced many of us to the newer, smaller, faster AD9850 DDS chip,
controlled by the PIC16C54 uC. The article may be downloaded via the links below, and it is a great introduction to one of the very first
mass-constructed DDS chip designs by hams all over the world.
Original DDSVFO Article by Curtis Pruess WB2V, QEX 1997
(Posted with permission from the American Radio Relay League)
JPG & TIF Pages: Page 1 Page 2 Page 3 Page 4 Page 5 Page 6
or Complete article: 8MB PDF file (right-click as safe to your computer)
Later on during 2004-or-so, N2APB and N2CX packaged the AD9850 DDS chip, the necessary LPF and output amplifier
onto a convenient design on a small, pluggable printed circuit board called it the DDS Daughtercard, which was able to
generate good quality sine waves from 1-30 MHz.
Original DDS Daughtercard, aka "DDS-30"
And then we later updated the DDS chip to the faster AD9851 and also went through numerous version the output amplifier (MMIC, discrete transistor,
the LHC-1252, and finally settling on use of the AD8008, a dual op amp with good gain-bandwidth product for stability and low roll-off characteristics to
minimize the effects of sin(x)/x amplitude changes as frequency increases. We dubbed it the "DDS-60" and this has been (and continues to be) available
since then over the years
DDS-60 Daughtercard ... (http://midnightdesignsolutions.com/dds60/index.html)
Simplicity has been the key to the DDS-60's popularity over the years. Consisting only of the AD9851 DDS chip U2, a clock oscillator module U4,
a low pass filter (LPF) to attenuate sampling artifacts and spurs above the chip's top usable frequency limit (60 MHz), and an RF amplifier that boosts
the DDS's native 250mVpp signal to +/- 4Vpp into a 50-ohm load (40 mW).
The DDS-60 is a self-contained functional module that generates a quality RF signal by using a small pc board containing just the bare DDS essentials – an Analog Devices AD9851 DDS chip, a clock oscillator, a 5th-order elliptic filter and an adjustable-level RF amplifier. Additionally, an onboard 5V regulator is provided so you only need provide a single 12V battery or power supply ranging anywhere from 8-12V DC. The three digital control lines, the power supply, and the output signal are all available on a pin header at the board edge. This 8-position pin header serves to allow the DDS-60 to be plugged into many projects on your bench, regardless of which microcontroller is employed. Just provide a single strip socket (e.g., a 16-pin IC socket split lengthwise) on the project board and plug in the DDS-60. A cable connected to the parallel printer port of your PC can even be used in conjunction with public domain PC software to control the DDS-60. See the Controller section in the full manual for a number of custom solutions illustrating easy control of the DDS-60. Once your controller-of-choice serially loads the control word into the DDS, the raw waveform is generated and presented to an elliptic filter that removes unwanted high-end frequency components, resulting in a signal of sufficient quality to serve as a local oscillator for a transceiver. We regularly see harmonic content down typically more than 40 dB. The signal generated by the DDS is quite small so we use an AD8008 low power amplifier to provide about 18 dB of gain to boost the signal to a maximum of about 4V p-p, which is quite usable for a variety of applications. This amplifier chip offers unconditional stability (k>1) and yields spectrally-clean signals. It is an ideal signal source for making impedance measurements in the Micro908 Antenna Analyst and other demanding applications. A trim pot allows precise manual control of the desired output level. The design accommodates supply voltages ranging from 12V all the way down to 8V, thus conveniently allowing for battery operation. The amplified signal is then available for use as a 50-ohm source input signal. If not used as an input to any other component or module, the output should be terminated with a 50-ohm load for the stated specifications to be realized.
DISSECTING THE DDS-60 CARD
Here we look at each of the four sub-circuits and consider some of the design considerations.
Discussion points ...
- 5V device
- Built-in 6x clock multiplier
- Reference oscillator U4: max of 180 MHz (x1) or 30 MHz (x6)
- Rset R10 useful pin to control output current to Iout
Low Pass Filter
Discussion points ...
- Zin, Zout = 50 ohms
- Zin || R12 = 24 ohms, balanced by 24-ohm R11 on Ioutb
- Cutoff frequency ~ 70 MHz
Discussion points ...
- Capacitively coupled input (C1), output (C7)
- 0.1 uF reactance only acceptable down to ~ 1 MHz, where it gets too large and reduces signal
- Need to raise C1 and C7 to about 10 uF to eliminate signal attenuation below 1 MHz
- Ideally also need to do same for feedback caps C2 and C5 (for gain to be proper)
- 2 stage amplifier for better stability
- R6-R9 divider biases input at 1/2 V+
- AD8008 spec'd at 12V max
- a& b jumper pads originally intended to allow user selection of externally-controlled digipot for gain control, but scheme not good
- R5 establishes Zout ... may want to eliminate (short) this for subsequent stages like a reflectometer.
Discussion points ...
- U3 is a nice 5V, 1A regulator in an SOT223 package
- Caution needed to ensure proper bypassing/filtering on input and output
Quick test of completed DDS-60 ... Alan W2AEW
"I assembled this AMQRP DDS-60 synthesizer kit for a fellow ham. It uses an Analog Devices DDS chip, a reference oscillator, RF output buffer and voltage regulator. I built a quick jig to program the device using the parallel port of an old computer."
KD1JV AVR Butterfly DDS-60 VFO ... Tom AK2B
"AVR Butterfly DDS-60 by Steve Weber, KD1JV. Constructed by ak2b from QRP radio projects."
Some builders of the DDS-60 card are surprised at how hot the components operate, particularly the DDS chip (U2) and the 5V voltage regulator device (U3). In quick summary, these components will indeed get pretty warm – in fact too warm to hold your finger on it for more than 5-10seconds – but this is quite normal and here is how we determined that:
Input: 13.4 volts, 128 ma
- Don't forget there's a diode between pwr connector & card, amounting to a 0.2 volt drop.
- This current is for fully operating DDS chip, with PLL turned on effectively creating a 180 MHz ref clock
Input: 13.4 volts
Output: 5 volts, 97 ma
Tj(max) = 150-degC
Theta-JA = 53-degC
Power: 650 mW (worst case from spec sheet, 180 MHz @ 5V)
Tj (max) = 150-degC
Theta-JA = 82-degC
Ambient Temp = 21.1-degC
- - - - - - - - - - -
Theta-JA = Thermal resistance from junction-to-ambient
The all-important equation for Tj (temp of internal semiconductor junction):
Tj = Tambient + (PWR x Theta-JA)
- - - - - - - - - - -
So for the REGULATOR ...
Tj = 21.1 + (((13.4 - 5) x .097) x 53) = 64.3-degC
... therefore, compared to Tj(max) of 150, we are well within spec.
And for the AD9851 ...
Tj = 21.1 + (.650 x 82) = 74.4-degC
... therefore again, compared to Tj(max) of 150, we are well within spec.
- - - - - - - - - - -
Temperature Measurements ...
Tambient = 21.1-degC (70-degF)
Regulator case = 71.1-degC (160-degF)
(Regulator heatsink tab) = 76.6-degC (170-degF)
AD9851 case = 63.9-degC (147-degF)
- - - - - - - - - - -
1) The DDS-60 is operating within component thermal and power specifications.
2) The "too hot to touch" cases for the regulator and DDS chips is probably correct. Even my
guitar-calloused fingers cannot be pressed on either of these chips for longer than 10 seconds
without a severe "Ouch!". But this is normal and okay, as long as the ambient temperature stays
below 195-degF (yes, an almost-boiling room temperature will exceed the max Tj of these components!)
The packages are made for this ... our fingers are not.
PS: Voltage, current and temperature measurements made with a Metex ME-11 DVM with a Fluke 80T-150U
Other DDS Analysis
"Performance of the IQPro DDS VFO and Evaluation of Wideband Opamps", by Gary W. Johnson, WB9JPS
Using the Arduino to Control the DDS-60 Card
Give this one a try yourself! If you've been following along with the Arduino design thread here in CWTD,
this should be a piece o' cake to get working!
(Note: Peter does not have the proper initialization sequence for the AD9851 in his sketch at this page and the code does not often work.
We added the initialization code and things work well now ... see the modified Arduino sketch. )
Sketch ... Sweeps DDS frequency from 10.000 MHz to 10.001 MHz (1 kHz). Easily hear in receiver tuned to 10 MHz
AD8951 BACKGROUND REFERENCE
AD9851 Data Sheet
180 MHz Clock Rate with Selectable 6Reference Clock Multiplier
On-Chip High Performance 10-Bit DAC and High Speed Comparator with Hysteresis
SFDR >43 dB @ 70 MHz AOUT
32-Bit Frequency Tuning Word
Simplified Control Interface: Parallel or Serial
Asynchronous Loading Format
5-Bit Phase Modulation and Offset Capability
Comparator Jitter <80 ps p-p @ 20 MHz
2.7 V to 5.25 V Single-Supply Operation
Low Power:555 mW @ 180 MHz
Power-Down Function,4 mW @ 2.7 V
Ultra small 28-Lead SSOP Packaging
Frequency/Phase-Agile Sine Wave Synthesis
Clock Recovery and Locking Circuitry for Digital
Digitally Controlled ADC Encode Generator
Agile Local Oscillator Applications in Communications
CW, AM, FM, FSK, MSK Mode Transmitter
The AD9851 is a highly integrated device that uses advanced DDS technology, coupled with an internal high speed, high performance D/A converter, and comparator, to form a digitally programmable frequency synthesizer and clock generator function. When referenced to an accurate clock source, the AD9851 generates a stable frequency and phase-programmable digitized analog output sine wave. This sine wave can be used directly as a frequency source, or internally converted to a square wave for agile-clock generator applications. The AD9851’s innovative high speed DDS core accepts a 32-bit frequency tuning word, which results in an output tuning resolution of approximately 0.04 Hz with a 180 MHz system clock. The AD9851 contains a unique 6REFCLK Multiplier circuit that eliminates the need for a high speed reference oscillator. The 6x REFCLK Multiplier has minimal impact on SFDR and phase noise characteristics. The AD9851 provides five bits of programmable phase modulation resolution to enable phase shifting of its output in increments of 11.25°.
The AD9851 contains an internal high speed comparator that can be confi gured to accept the (externally) filtered output of the DAC to generate a low jitter output pulse.
The frequency tuning, control, and phase modulation words are asynchronously loaded into the AD9851 via a parallel or serial loading format. The parallel load format consists of five it erative loads of an 8-bit control word (byte). The first 8-bit byte controls output phase, 6x REFCLK Multiplier, power-down enable and loading for mat; the remaining bytes comprise the 32-bit frequency tuning word. Serial loading is accomplished via a 40-bit serial data stream entering through one of the parallel input bus lines. The
AD9851 uses advanced CMOS technology to provide this break-through level of functionality on just 555 mW of power dissipation (5 V supply), at the maximum clock rate of 180 MHz.
The AD9851 is available in a space-saving 28-lead SSOP, surface-mount package that is pin-for-pin compatible with the popular AD9850 125 MHz DDS. It is specified to operate over the extended industrial temperature range of –40°C to +85°C at >3.0 V supply voltage. Below 3.0 V, the specifications apply over the commercial temperature range of 0°C to 85°C.
Programming the AD9851
The AD9851 contains a 40-bit register that stores the 32-bit frequency control word, the 5-bit phase modulation word, 6x REFCLK multiplier, enable, and the power-down function. This register can be loaded in parallel or serial mode. A logic high engages functions; for example, to power-down the IC (sleep mode), a logic high must be programmed in that bit location.
In serial load mode, forty subsequent rising edges of W_CLK will shift and load the 1-bit data on Pin 25 (D7) through the 40-bit register in shift-register fashion. Any further W_CLK rising edges after the register is full will shift data out causing data that is left in the register to be out-of-sequence and corrupted. The serial mode must be entered from the default parallel mode (see Figure 17). Data is loaded beginning with W0 and ending with W39. One note of caution: the 8-bit parallel word (W0)—xxxxx011—that parallel word (W0)—xxxxx011—that parallel invokes the serial mode should be overwritten with a valid 40-bit serial word immediately after entering the serial mode to prevent unintended engaging of the 6x REFCLK multiplier or entry into the factory test mode. Exit from serial mode to parallel mode is only possible using the RESET command.
Interactive Design Tool for Direct Digital Synthesis
AD9851 Device Configuration Assistant
An applet for calculating codewords and harmonic images in the AD9851 DDS Synthesizer.
Electrical Specifications of Interest
Current @ 180 MHz Clock, 5 V Supply 25°C 110-130 mA
Power Dissipation @ 180 MHz Clock, 5 V Supply 25°C 555-650 mW
PDISSPower-Down Mode @ 5 V Supply 25°C 17-55 mW
Cool Product of the Month ... Poles: "SOTAbeams Travel Mast 10m"
Not magnetic, ethnic or Earth-axis in nature ... but glass reinforced plastic telescoping antenna pole used to hold up antennas during field operations. Just right for the upcoming annual Field Day event! ... http://www.sotabeams.co.uk/travel-mast-10m/ ... $84.27
"This is our brand new 10m (33ft) Travel Mast. With a transport-length of only 67cm ( 26.5 inches ) fits also in a suitcase making it perfect for vacation DXing. The base diameter is 48mm and the tip diameter is 4mm. The mast consists of 17 sections and weighs just 1300g (2.9 lbs) The color is grey and we also supply a cloth bag. The 10m Travel Mast is the great choice for a vacation DX-pedition."
"The mast is made of Glass Reinforced Plastic (GRP). This is an insulator with excellent RF properties (very low loss). The top section is hollow with a hole at the top."
Other comparable poles telescope down to almost 4 ft ...
- Very sturdy 33 ft telescoping mast) ... DK9SQ 33 foot telescoping mast (Kanga US usual vendor but out of stock)
- Lighter duty mast is the MFJ-1910.... <http://www.mfjenterprises.com/Product.php?productid=MFJ-1910>
- Jackite 31 ft telescoping pole ... <http://www.jackite.com/product_info.php?cPath=41_44&products_id=133&osCsid=dea9a7d7160650b0f9a405175d8b20e5>