May 6, 2014
Automatic Level Control (ALC) Techniques for DDS-based Designs
Keeping your DDS Output at a Constant Level ... and Calibration Approaches for when it's not!
Most homebrewers know that DDS boards suffer from output level roll-off due to the sampling theorem (sinc function), as well as due to gain-product bandwidth limitations of amplifiers used after the LPF on the DDS boards. And sometimes that roll-off can result in as much as five times lower voltage level at 60 MHz than at the lower frequencies. For applications using a DDS in accurate measurement applications, designers usually correct for this frequency-dependent level change using some sort of calibration technique ... which can sometimes be a challenge.
In this episode of CWTD, we discuss a relatively simple ALC circuit that seems to be working splendidly, and can be used with any designs using the AD9850 or AD9851 DDS chips. We believe it will have a profound effect on applications performing accurate measurements.
73, George N2APB & Joe N2CX
CWTD Episode #68: Automatic Level Control for DDS-based Designs
... For keeping your DDS Output at a Constant Level
We covered DDS designs in detail back in CWTD episode #55 ... http://www.cwtd.org/Jun4.html
But it really all started back in 1997 with Curtis Pruess, WB2V ...
And "the problem" has been with us all ever since ... roll-off due to digital sampling theorem,
resulting in DDS output levels getting lower and lower as signal frequency approaches the Nyquist limit.
Falling Off the Wagon
Output level follows the curve of the "sinc function" ... sin(x)/x ... http://mathworld.wolfram.com/SincFunction.html
A Technical Tutorial on Direct Digital Synthesis ... http://www.ieee.li/pdf/essay/dds.pdf
Enter the popular DDS-60 frequency generator card ...
Top Side: Bottom Side:
Automatic Level Control for the DDS-60
ALC is achieved with the DDS by controlling the constant current generation in the DDS chip, via the "Rset" pin.
Continuously adjusting the current, based on the output level sensed from the DDS signal being generated, thus keeps the output level constant.
DDS60 ALC Theory of Operation
- DDS ALC is provided by sensing the card output level and providing appropriate feedback
- The ALC circuit takes advantage of the output level set of the AD9851 DDS chip.
- MOSFET Q1 serves as a variable resistor on that pin to vary the output.
- Series resistor R37 is a failsafe to limit the maximum DDS output level.
- A resistance to ground sets a DC current internally whose value set the sine wave output.
- D1 rectifies the DDS card amplifier output providing a DC level at the peak AC output.
- The first two sections of the LMC6484 linearize the detected voltage and amplify it.
- The third op amp section compares the detected DC level to a level set by R43.
- The associated resistors set feedback loop gain and the capacitor prevents oscillation.
- The difference is amplified and applied to the gate of MOSFET Q1 whose drain to source resistanc
varies with bias. More DC gate voltage gives lower output resistance, and vice versa.
- This feedback loop tends to correct for sinewave output voltage variation from the DDS60.
- Note that the detected RF voltage is before the DDS card 50 ohm output resistor.
- This allows the output impedance of the card to be 50 ohms as needed for driving RF filters.
- If it were on the output side of the resistor the net output impedance would be 0 ohms.
It is important to achieve the right balance of "usable output signal" via the onboard DDS level control, and the setting of the DDS Level Set potentiometer.
Again, a view of the uncontrolled DDS output level, as seen by a recorded scan of the DDS output from 10-50 MHz (on left), we see a continuous roll-off
in signal level.
Whereas, with the ALC applied, the level will be much like the display shown on the right.
Signal Source Flatness (and Calibration Techniques) in the Poor Ham's Scalar Network Analyzer
Need to ensure the signal source and detector have a flat frequency response
- If not, accurate frequency response can't be determined
1st way is to flatten response of the source
- Difficult with DDS since it has an inherent high frequency rolloff
- However an ALC (Automatic Level Control function can be added
This may be all that is needed if the RF detector has a flat response
- AD8307 is fairly good in this respect in the PHSNA implementation
- But component and layout variation can degrade it
- Ref 1 shows frequency dependent qualities of common bypass/coupling
components that might affect the detector (note W7ZOI influence)
Elegant way to counteract frequency dependent effects is to calibrate them out
- PHSNA software uses this compensation technique
- Measures signal generator directly to RF detector
- Then uses Excel to calculate polynomial curve to compensate
- Calculate parameters are manually entered into memory (Ref 2,3)
- NAT (Network Analyzer Terminal) uses different method
- Measures response similar to PHSNA
- Then computes a correction value for each frequency step in sweep.
To view the effects of the correction simple sweep with the generator conencted directly to the RF detector and plot the results.
- Ref 4 shows such a sweep with the PHSNA correction method.
- Ref 5 shows the corresponding NAT method sweep (TBD) as it varies from 1-60 MHz
Ref 4 - W5JH reference sweep 3 Sept.pdf
Ref 5 - TBD
NAT-calibrated: Calibration via Polynomial Curve Fitting:
DDS-60 Card ... http://midnightdesignsolutions.com/dds60/index.html
AD-9850 Modules (a selection of overseas eBay sources):
Analog Devices AD9850 DDS datasheet: ... http://www.analog.com/static/imported-files/data_sheets/AD9850.pdf
Analog Devices AD9851 DDS Datsheet ... http://www.analog.com/static/imported-files/data_sheets/AD9851.pdf